Designing the start of a chip is always one of the keys of designing the chip. A large part of the reason why many devices are failed and discarded is that the failure of start of a chip causes the chip failure and finally causes of discarding of the whole device. When a chip is starting, implementation of some initialization operations and configuration managements is required in the chip. When the chip is in a small scale, the initialization and configuration of the chip is directly included in a clock reset design of the chip. The process of clock reset operation is completed while the chip is powered on, that is, the chip starting process is completed. After the clock reset is completed, the chip can operate normally.
Then, the chip scale is extended, for example, processors are added. Configuration information about the start of the chip is usually stored on an on-chip Read Only Memory (ROM); when the chip is starting, the configuration information on the ROM is called to perform initial configuration to the chip.
With the increasing extension of the chip scale and the diversification of application scenarios of the chip, the chip has more and more contents to be initialized, and the initialized contents require to be updated, so many chips store start programs in an ROM+flash mode or a direct flash mode. In this two modes, high-volume initialization programs which can be upgraded are stored in the flash.
Later, upgrading has some difficulties in the flash mode, so a series of solutions are provided in the related art to improve the robustness and convenience of upgrading the initialization programs. The current optimizing solutions for the start of chip still focus on the optimization of software, such as jump and data backup, but rarely involve the structure of hardware, let alone the current multi-core and multi-channel chip. The widely used multi-core and multi-channel chip has a very strict requirement for channel quality in the start process, if a flash channel has problems, the start of the chip will inevitably fail, which causes the failure of the whole chip.